NZ2MC-8MBS bộ nhớ mở rộng SRAM MELSEC iQ-R Series CPU

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Ngày: 29/06/2019

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Bộ nhớ mở rộng SRAM MELSEC iQ-R Series CPU

Programmable Controller CPU Modules

At the core of the MELSEC iQ-R Series is a programmable controller CPU. This CPU is the heart of the control system and includes various features for different applications. The most common CPU is the programmable controller CPU, into which various features are embedded, enabling it to perform a wide range of control tasks. The different CPUs are highly scalable with five types available, based on program capacity needs (10K to 1200K steps). In addition, a CC-Link IE embedded CPU is available, further reducing hardware costs as a separate network module is not required.

Programmable controller CPU module specifications

Control methodStored program cyclic operation
I/O control modeRefresh mode (Direct access I/O is available by specifying direct access I/O (DX, DY))
Programming languageLadder diagram (LD),
structured text (ST), function block diagram (FBD),
sequential function chart (SFC)
Extended programming languageFunction block (FB), label programming (system/local/global)
Program execution typeInitial, scan, fixed scan, interrupt, standby
Number of I/O points [X/Y] (point)40964096409640964096409640964096
Constant scan (ms)
(Function for keeping regular scan time)
(Setting available in 0.1 ms increments)
(Setting available in 0.1 ms increments)
Memory capacity
Program capacity (step)10K15K20K40K80K160K320K1200K
Program memory (byte)40K60K80K160K320K640K1280K4800K
Device/label memory*6 (byte)252K252K252K400K1188K1720K2316K3380K
Data memory (byte)1.5M1.5M1.5M2M5M10M20M40M
Instruction processing time
LD instruction (ns)31.3631.363.920.980.980.980.980.98
MOV instruction (ns)62.7262.727.841.961.961.961.961.96
E + instruction (floating-point addition) (ns)100.0100.
Structured text IF instruction*7 (ns)31.3631.363.921.961.961.961.961.96
Structured text FOR instruction*7 (ns)31.3631.363.921.961.961.961.961.96
PC MIX value*8 (instructions/µs)1919146419419419419419
Interface connection port
High Speed USB2.0 (miniB)
Ethernet (100BASE-TX/10BASE-T)
CC-Link IE connection port
*9 *10*9 *10*9 *10*9 *10*9 *10
CC-Link IE Field Network Basic connection port
Memory interface
SD memory card
Extended SRAM cassette
Multiple interrupt
Standard PID control
Internal database
Memory dump
Data logging*11*11
Real-time monitor
Inter-modular synchronization
SLMP communication
Firmware update*12
*6: Extended SRAM cassette expands the device/label memory area.
*7: The IF or FOR sentence of the structured text consists of several instructions, which may increase the processing time period.
*8: Average number of instructions such as for basic instructions and data processing executed in 1 µs. The larger the value, the faster the processing speed.
*9: Available with R□ENCPU. For details about network specifications, refer to the RJ71EN71 performance specifications.
*10: The following networks are supported, Ethernet, CC-Link IE Control (twisted pair cable), and CC-Link IE Field (two simultaneous Ethernet networks and combined CC-Link IE Field and CC-Link IE Control networks are not supported).
*11: Logging data can be saved in the SD memory card only.
*12: Depends on supported CPU firmware version, for more information please refer to the related product manual.


SD memory card*13 specifications

TypeSD memory cardSDHC memory cardSDHC memory cardSDHC memory card
Capacity (byte)2G4G8G16G
*13: SD memory card is not supported for the R00CPU.


Extended SRAM cassette specifications

Capacity (byte)1M2M4M8M8M16M
Supported CPU modules
Programmable controller CPU*14
Process CPU
SIL2 process CPU
Safety CPU
*14: Not supported for R00CPU, R01CPU, R02CPU.


Battery-less option cassette*15

TypeOption cassette
*15: Supported for R04(EN)CPU, R08(EN)CPU, R16(EN)CPU, R32(EN)CPU, R120(EN)CPU.